The most common use of an I2C interface is to send and receive data in compliance with the I2C specification. This implies that the device we are talking to is known to conform to the I2C standard, as well. However, there are situations in which this particular aspect of a device is to be tested, i.e. where the goal is to determine whether or not a device is fully compliant with the I2C specification and how this device behaves in case of ill-formed signals. Our negative tester is designed to fulfill all requirements introduced by this kind of application. It is capable of acting as master or as slave. In both roles it allows to control all relevant low-level aspects of bus communication, in particular it provides functionality to define the timing for each and every bit. It is even possible to send out patterns which violate the standard, e.g. make a "byte" six bits long. In slave mode the negative tester permits to stretch the clock at any time. The user has full control over arbitration handling in master mode. Further more, independent configurable output signals can be used to trigger external events or to flag certain states in real time.
A graphical user interface enables you to create complex test scenarios from existing elementary test steps without any programming. These test cases can be stored for later use and test reproduction.
I2C Studio offers the following predefined test cases:
This device is based on the telos Tracii XL 2.0 platform. This let's you work with the negative tester in the same hardware and software environment as for other I2C tasks such as tracing and bus control. The physical and electrical aspects of the negative tester device are identical to the Tracii XL 2.0. If you are used to work with the telos I2C Framework, you will appriciate that working with the negative tester follows the known concepts.
Note that it is not possible to use the negative tester as I2C master or I2C tracer.